An 800-ps Origami True-Time-Delay-Based CMOS Receiver Front End for 6.5–9-GHz Phased Arrays

A true-time-delay-based (TTD-based) receiver front end with 800-ps time delay for 6.5-9-GHz wideband phased arrays has been designed for satellite communication in a 65-nm CMOS technology. The proposed receiver front end consists of a balanced low-noise amplifier (LNA), a 6-bit attenuator with 15.75-dB tuning range, a programmable TTD element featuring 800-ps delay with 25-ps delay step, and an output buffer amplifier. A differential origami inductor is proposed to boost the delay unit's quality factor and mitigate the insertion loss introduced by the artificial transmission line (ATL). A current-mode radio-frequency (RF) multiplexer is designed to ensure a rapid delay switching. The receiver front end demonstrates a 3.6-dB noise figure (NF) with an 18-dB typical gain and an input 1-dB compression point (IP1dB) of -17 dBm at 6.5-9 GHz. This TTD element allows for a low insertion loss and a small chip area per unit time delay of ATL-based RF TTDs.