Logic-Depth-Aware Technology Mapping Method for RSFQ Logic Circuits With Special RSFQ Gates

Nobutaka Kito,Kazuyoshi Takagi,Naofumi Takagi

IEEE Transactions on Applied Superconductivity（2022）

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摘要

This article proposes a method for generating RSFQ logic circuits utilizing special RSFQ gates in logic synthesis. It is suited for the standard technology mapping flow used in logic synthesis tools and enables generating RSFQ circuits utilizing confluence buffers (CBs) and resettable DFFs (RDFFs), to reduce the number of clocked gates by reduction of logic depth. A library of supergates, each con...

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关键词

Logic gates,Libraries,Tools,Logic circuits,Standards,Clocks,Logic functions

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