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Modified Peripheral MRAM Sensing for In-memory Boolean Logic

2021 IEEE 14th International Conference on ASIC (ASICON)(2021)

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摘要
Computing-in-Memory (CIM) is the breakthrough of the upcoming non-Von Neumann architecture and realizes the fusion of memory and processor. Computing in spin transfer torque magnetic RAM (STT-MRAM) is expected to achieve both ultra-low-power and interconnection delay reduction. In this work, we propose a modified peripheral sensing circuit for CIM in STT-MRAM with dual working modes, normal sensing amplification and in-MRAM Boolean logic operations (AND, OR, XOR, XNOR). Dual word-lines of MRAM array are simultaneously enabled to perform logic and full adder (FA) operations based on two sets of selected data. Compared with traditional methods of full addition, the proposed design only needs to sense once to obtain the result, which can double time efficiency and increase energy efficiency by more than 20%.
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关键词
dual working modes,normal sensing amplification,in-MRAM Boolean logic operations,dual word-lines,MRAM array,adder operations,modified peripheral MRAM sensing,computing-in-memory,CIM,Neumann architecture,spin transfer torque magnetic RAM,STT-MRAM,ultra-low-power,interconnection delay reduction,modified peripheral sensing circuit,in-memory Boolean logic,AND,OR,XOR,XNOR,FA,full adder operations,energy efficiency
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