22 nm Embedded STT-MRAM Macro with 10 ns Switching and >1014 Endurance for Last Level Cache Applications

2021 Symposium on VLSI Technology(2021)

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摘要
We demonstrate high performance 22 nm embedded STT-MRAM with a distinct combination of 10 ns write speed and >1014 endurance at chip level. This is achieved by developing a unique MTJ free layer that exhibits high Hk, low moment and low damping, which dramatically reduced switching current at short pulse widths. We further show that this MTJ design meets data retention requirement of 10 years at 105°C.
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