PERC: Posit Enhanced Rocket Chip

Balancing between precision and performance is a known trade-off in system design. Universal Number system attempts to dissolve this trade-off with its flexible arbitrary precision bound within fixed bit length. Its Type-III class, also known as Posits, has been especially introduced to be hardware implementation friendly. Posit is a dynamic floating-point representation that ensures better accuracy and precision using a system that minimizes the number of unusable representations and introduces a higher dynamic range which can serve as a substitute for the IEEE-754 2008 floating-point standard. In this paper, we share our experience with implementation and integration of a Posit Processing Unit (PPU) into the Rocket Chip SoC generator. This PPU replaces the IEEE-754 2008 FPU inside the chip, and supports both of RISC-V ISA floating-point extensions namely ‘F’ for single precision and ‘D’ for double precision using 32-bit and 64-bit posits respectively. We discuss various design choices that were available to us and the decisions made in this work. We elaborate our use of Chisel, a Scala embedded hardware construction DSL, to describe our design. Later we observe how various constructs in Chisel help not only to describe a product but also aids the description process in a robust, flexible and efficient manner. We further delve into how the design has been tested using a version of the RISC-V ISA test suite which has been modified for Posit arithmetic numbers. The paper also discusses the scope for future work that can be done, including a posit arithmetic accelerator and higher-level toolchain support for posits. ACM Reference Format: Arunkumar M. V., Sai Ganesh Bhairathi, and Harshal G. Hayatnagarkar. 2020. PERC: Posit Enhanced Rocket Chip. In Proceedings of Fourth Workshop on Computer Architecture Research with RISC-V (CARRV 2020). ACM, New York, NY, USA, 8 pages. https://doi.org/10.1145/nnnnnnn.nnnnnnn Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from permissions@acm.org. CARRV 2020, May 30, 2020, Valencia, Spain © 2020 Association for Computing Machinery. ACM ISBN 978-x-xxxx-xxxx-x/YY/MM. . . $15.00 https://doi.org/10.1145/nnnnnnn.nnnnnnn