High yield and process uniformity for 300 mm integrated WS2 FETs
2021 Symposium on VLSI Technology(2021)
摘要
We demonstrate an integrated process flow on full 300mm wafers with monolayer WS2 channel. WS2 is a 2D semiconductor from the transition metal dichalcogenide family and holds promise for extreme gate length scaling. We report here on integration challenges and optimize process uniformity for a single-device yield higher than 90% across wafer. These transistors and integration flow are shown to be compatible with H2 anneal of at least 400 C and hence in principle suitable for hybrid integration in the BEOL.
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