FPGA Implementation of CORDIC Algorithms for Sine and Cosine Floating-Point Calculations

A new modified hybrid algorithm of the floating-point calculations of the sine and cosine functions is proposed. The three stages of the algorithm calculate the rotations of the vector to the angles, which are given by three slices of the reduced argument code. They are the ROM table, network of CORDIC micro rotations, and approximation network, respectively. This helps to minimize both the hardware volume and latent delay of calculations. The algorithm is implemented in the module configured in FPGA, which calculates the single-precision sine and cosine functions of the floating-point argument with the latent delay of 15 clock cycles. The error of calculations for small angles does not exceed one and half of the mantissa least significant bit.