Linear Characteristic Analysis of High-Resolution Counter-Based Frequency Detector in Type-I Digital PLL

This brief analyzes a linear characteristic of the high-resolution counter-based frequency detector (CBFD) using sinusoidal jitter. The theoretical gain of the Vernier-type CBFD can be derived by observing the output responses for the tone input in the time domain. A type-I digital phase locked loop (DPLL) using the CBFD is free from the issues related to the input static phase offset and the loop is unconditionally stable. Based on the loop dynamics of a DPLL with a CBFD (CB-DPLL), a jitter optimization in presence of phase noise of in-band and oscillator $1/{f}^{2}$ has been conducted. This analysis provides us with insights to design the CB-DPLL with the minimum output jitter.