A 2.56-GS/s 12-bit 8x-Interleaved ADC With 156.6-dB FoM_S in 65-nm CMOS

This article presents a 2.56-GS/s 12-bit eight-channel interleaved analog-to-digital converter (ADC) that achieves an FOM $_{S}$ of 156.6 dB at near the Nyquist input frequency of 1.2 GHz in 65-nm CMOS technology. A new technique is employed to mitigate the effect of comparator metastability. In addition, a noise averaging calibration method is implemented to calibrate the comparator offset in each subchannel in the foreground. Moreover, a digital-to-time delay tuner is employed to minimize the time skew among the eight channels. Several other calibration techniques are also employed to reduce the interchannel and intrachannel nonidealities. The single subchannel ADC achieves an SNDR of 59.6 dB and an FOM $_{S}$ of 167.3 dB at the Nyquist input frequency with a sampling rate of 350 MS/s. With eight subchannels interleaved, the 2.56-GS/s ADC achieves an SNDR of 55.7 dB and an SFDR of 64 dB at the Nyquist input with calibration. In addition, the measured differential nonlinearity (DNL) and integral nonlinearity (INL) of the interleaved ADC are 0.51/−0.4 LSB and +1.38/−0.89 LSB, respectively.