Synthesized Garbage Collection for FPGA Accelerators

ABSTRACTSpeed and ease of accelerator design is a growing need. High level programming languages have provided significant gains in the software world, but lag in the hardware realm. We present a hardware implementation of a garbage collector, which automates memory management, one of the major conveniences of modern software languages. Our garbage collector is integrated with a Haskell to hardware HLS flow. The collector runs concurrently with the application, using already-idle memory slots to do its work with little to no impact on performance. To achieve this, our collector exploits rapid synchronization that is straightforward in hardware but very difficult in software. With this synchronization, the collector is able to safely pop in and out of very fine pockets of idleness on a cycle by cycle, heap by heap basis. In most cases our collector incurred negligible overhead, and slowed the application only when the heaps were so tiny that the application was unable to proceed with its operation until the collector had freed more space. Our experiments further show that our concurrent collector performs best under an eager collection policy that collects garbage well-before the application exhausts the available memory. Although this eager strategy performs more collection operations than strictly necessary, the application never pauses and the collector operates entirely in the background.