Design and Implementation in VHDL Code of the Discrete Cosine Transform over Finite Fields for Symmetric Convolution Operation

The discrete cosine transform is a very important mathematical tool for image processing operations, such as filtering, recognition, segmentation, compression, etc. We present the design and implementation of the description and synthesis in VHDL code of the discrete cosine transform over the finite field with an order given by the Mersenne prime number 127, in order to perform the symmetric convolution operation. The development of the VHDL code for the discrete cosine transform and the symmetric convolution operations are performed using the HDL Coder in Simulink. The discrete cosine transform over finite field is defined using a new trigonometric transform proposed recently. The main aim for the development of the discrete cosine transform and the symmetric convolution hardware architectures over finite field is to integrate these architectures in applications of filtering, encryption and recognition of images.