Review and Analysis of Charge-Pump Phase-Locked Loop

crossref(2020)

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摘要
A Charge Pump Phase-Locked Loop (CP-PLL) is one of the very important circuits used in the communication system. Its main purpose is to lock the phase and frequency of two signals one can be named as reference signal while other as a feedback signal. It comprises a phase-frequency detector (PFD), a charge pump (CP), a loop filter (LF), and a voltage control oscillator (VCO). In this paper, we are presenting a review and analysis of various configurations of CP-PLL made by different researchers. The analyses mainly emphasize on linear and nonlinear second and third-order CP-PLL.
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关键词
Phase-locked loop (PLL), Charge pump, S-domain, Loop filter, Phase noise, Jitter, VCO
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