A Power-Efficient Current Readout Circuit with VCO-Based 2 nd -Order CT $\Delta\Sigma$ ADC for Electrochemistry Acquisition

This paper presents an application specific integrated circuit (ASIC) for electrochemistry acquisition with a high power-efficient current readout circuit. The proposed ASIC includes a current-sensing voltage-controlled oscillator (VCO)-based continuous-time delta-sigma modulator (CTDSM), a decimation filter, an UART package generator and low-dropout regulators. The proposed VCO-based CTDSM features direct connection to the electrochemical sensor without pre-amplifier, which can directly quantize the reaction current signal to achieve a better power efficiency. Second order noise shaping is achieved by using an additional capacitor as a passive integrator and a dual-VCO structure as an integrator in phase domain. The digital circuitry mainly functions as a decimation filter and an UART package generator. The proposed ASIC implemented in TSMC 0.18 \mu\mathrm{m}$ CMOS process can achieve 73 dB dynamic range (DR) and power efficiency of 0.73 while consuming only $73.9 \mu\mathrm{W}$ . The total chip area is 2.25 mm2.