A 25μm pitch LWIR focal plane array with pixel-level 15-bit ADC providing high well capacity and targeting 2mK NETD
Proceedings of SPIE(2010)
摘要
CEA Leti has recently developed a new readout IC (ROIC) with pixel-level ADC for cooled infrared focal plane arrays
(FPAs). It operates at 50Hz frame rate in a snapshot Integrate-While-Read (IWR) mode. It targets applications that
provide a large amount of integrated charge thanks to a long integration time. The pixel-level analog-to-digital
conversion is based on charge packets counting. This technique offers a large well capacity that paves the way for a
breakthrough in NETD performances. The 15 bits ADC resolution preserves the excellent detector SNR at full well
(3Ge-). These characteristics are essential for LWIR FPAs as broad intra-scene dynamic range imaging requires high
sensitivity. The ROIC, featuring a 320x256 array with 25μm pixel pitch, has been designed in a standard 0.18μm CMOS
technology. The main design challenges for this digital pixel array (SNR, power consumption and layout density) are
discussed. The IC has been hybridized to a LWIR detector fabricated using our in-house HgCdTe process. The first
electro-optical test results of the detector dewar assembly are presented. They validate both the pixel-level ADC concept
and its circuit implementation. Finally, the benefit of this LWIR FPA in terms of NETD performance is demonstrated.
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