A 0.018 %/V Line Sensitivity Voltage Reference With -82.46 dB PSRR at 100 Hz for Bio-potential Signals Readout Systems

IEEE Transactions on Circuits and Systems Ii-express Briefs(2022)

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摘要
This brief presents a high power supply ripple rejection (PSRR) and low line sensitivity voltage reference for driving right leg (DgRL) circuits in bio-potential signals readout systems. The proposed voltage reference circuit employs the collector common-mode voltage extraction feedback (CVEF) architecture and the all-sub-threshold-region low line sensitivity (ASLS) circuit to achieve high PSRR and low line sensitivity. A prototype has been taped out using a 0.35-μm CMOS technology, and the chip core occupies 0.16 mm. The measured reference voltage is about 1.22 V, and its average temperature coefficient (TC) in the range of -40 ∘C to 125 ∘C is 12.3 ppm/∘C. The measured PSRR of a random chip with 5 V supply voltage is -80.29 dB, -80.16 dB, -82.46 dB, -76.04 dB, -73.17 dB and -38.59 dB at 10 Hz, 50 Hz, 100 Hz, 500 Hz, 1 kHz and 100 kHz, respectively. In the 2-5 V VDD range, the line sensitivity of the proposed circuit is 0.018 %/V. The current consumption of the whole circuit is 23.2 μA when VDD takes the minimum value 2V at room temperature.
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关键词
All-sub-threshold-region low line sensitivity (ASLS),collector common-mode voltage extraction feedback (CVEF),driving right leg (DgRL) circuits,high power supply ripple rejection (PSRR),temperature coefficients
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