Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays.
ACSCC（2021）
摘要
We present a pipelined multiplier with reduced activities and minimized interconnect based on online digit-serial arithmetic. The working precision has been truncated such that $p更多
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关键词
reduced activities,minimized interconnect,online digit-serial arithmetic,working precision,bits product,digit slices,variable precision,error profile,pipelining,compute intensive inner products,synthesis results,conventional serial-parallel array multipliers,8 bit precision,16 bit precision,24 bit precision,32 bit precision,pipelined online multiplier,precision truncation,inner product arrays,pipelined multiplier,word length 8.0 bit,word length 16.0 bit,word length 24.0 bit,word length 32.0 bit
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