Logic Functions Realized Using Clockless Gates for Rapid Single-Flux-Quantum Circuits

Superconducting rapid single-fluxquantum (RSFQ) circuit is a promising candidate for circuit technology in the post-Moore era. RSFQ digital circuits operate with pulse logic and are usually composed of clocked gates. We have proposed clockless gates, which can reduce the hardware amount of a circuit drastically. In this paper, we first discuss logic functions realizable using clockless gates. We show that all the 0-preserving functions can be realized using the existing clockless gates, i.e., AND, OR, and NIMPLY (not-imply) gates. We then propose a circuit architecture composed of both clocked gates and clockless gates.