Realization of Power and Area efficient 16-bit Equality Comparator using m-GDI Technology

In recent days, low-power, high-speed and area-efficient designs have found their pathway in every application. Embedding more functional modules which operate at high speed and consume less power within the specified area is the striving goal of the VLSI industry. To meet the market demands, different techniques and different methodologies are being used to implement the VSLI circuits. These techniques exhibit the trade-off among different parameters. The modified gate diffusion input (m-GDI) technology is evolving as a promising technique for VLSI implementation which results in low power and high-speed design and also employs fewer transistors when compared to the conventional CMOS technique. In this paper, a modified gate diffusion input (m-GDI) based 16-bit equality comparator is presented. The number of transistors, delay and power are considered for performance analysis. All the designs are done using Cadence Virtuoso tool at 45 nm technology with the supply Vdd=1.2V. Spectre simulator is used for the simulation.