Electrical Properties of the Base‐Substrate Junction in Freestanding Core‐Shell Nanowires

Well-defined hetero-interfaces with controlled properties are crucial for any high-performance, semiconductor-based, (opto-)electronic device. They are particularly important for device structures on the nanoscale with increased interfacial areas. Utilizing a ultrahigh-vacuum based multi-tip scanning tunneling microscope, this work reveals inadvertent conductivity channels between the nanowire (NW) base and the substrate, when measuring individual vertical core-shell III-V-semiconductor NWs. For that, four-terminal probing is applied on freestanding, epitaxially grown coaxial p-GaAs/i-GaInP/n-GaInP NWs without the need of nanoscale lithography or deposition of electrical contacts. This advanced analysis, carried out after composition-selective wet chemical etching, reveals a substantially degraded electrical performance of the freestanding NWs compared to detached ones. In an electron beam induced current mode of the nanosensor, charge separation at the substrate-to-NW base junction is demonstrated. An energy dispersive X-ray spectroscopic linescan shows an unintended compositional change of the epitaxially grown NW toward the planar layers caused by different incorporation mechanisms of Ga and In at the NW base. This approach provides direct insight into the NW-substrate transition area and leads to a model of the conductivity channels at the NW base, which should, in principle, be considered in the fabrication of all NW heterostructures grown bottom-up on heterogeneous substrate materials.