Analysis on Endurance Characteristics of Ferroelectric Memory Device

Endurance characteristics of ferroelectric-gate field effect transistor (FeFET) memory are analyzed through DC and fast drain current (I-D)-gate voltage (V-G) measurements. From the fast I-D-V(G)s before endurance cycling, it is revealed that acceptor-like traps with millisecond-order response time are predominantly responsible for the degradation of the device. After endurance cycling, it is found that only the SS is degraded in the program state, while the rightward threshold voltage (V-th) shift and the SS degradation simultaneously occur in the erase state. This behavior can be successfully explained by the emptying and filling of the trap states by program and erase pulses, respectively.