Complementary High-Voltage Compliant High-Current Output Stages for PoDL

2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)(2022)

引用 0|浏览3
暂无评分
摘要
This paper presents the design of two complementary high-voltage compliant high-current output stages manufactured in an 0.18 $\mu$m high-voltage CMOS technology. The proposed circuits provide a high-voltage compliant monolithic interface for conventional current-steering digital-to-analog converters in the context of Power over Data Lines (PoDL) for Automotive Ethernet. The proposed output stages differ in their function as current sink or current source. Both are composed of improved active-feedback cascode current mirrors with a very large input to output current ratio of 1:50. The current source is the first reported high-voltage compliant current source featuring this topology in a two-stage design. Both circuits offer the widest reported output range for high-voltage compliant current output stages at 500 mA. With a passband gain of 34 dB, both proposed circuits do also extend the state-of-the-art in terms of the achieved gain-bandwidth product at 544 MHz and 656 MHz respectively.
更多
查看译文
关键词
CMOS analog design,current mirror,high-voltage,Automotive Ethernet,PoDL,DAC
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要