谷歌浏览器插件
订阅小程序
在清言上使用

Selective Harmonic Elimination Using MFO for a Reduced Switch Multi-level Inverter Topology

2022 IEEE Symposium on Industrial Electronics & Applications (ISIEA)(2022)

引用 0|浏览1
暂无评分
摘要
This research article proposed a new modified single-phase multi-level inverter topology with an optimal switching control strategy to reduce the inverter output harmonic distortion. The topology is configured to operate in asymmetric mode to generate eleven levels of output voltage steps. Additionally, a selective harmonic elimination technique has been deployed to minimize the switching loss and EMI. The Moth Flame Optimization (MFO) algorithm is deployed to compute the optimal switching angles. The proposed MLI topology is simulated in PSIM software using the optimized switching angles. The inverter performance parameters such as the total harmonic distortion (THD), harmonic amplitudes, switching, and conduction losses, were also analyzed and reported. The topology total harmonic distortion is 2.4%, hence satisfying the IEEE 519 standard.
更多
查看译文
关键词
Moth Flame Optimization,Total Harmonic Distortion,Selective Harmonic Elimination,Multi-level Converter Topology,Hardware-In-Loop testing
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要