ESD Protection Diodes in Sub-5nm Gate-All-Around Nanosheet Technologies

Shih-Hung Chen,Anabela Veloso,Hans Mertens,Geert Hellings,Marko Simicic,Wen-Chieh Chen,Wei-Min Wu,Kateryna Serbulova,Dimitri Linten, Naoto Horiguchi

2020 42nd Annual EOS/ESD Symposium (EOS/ESD)（2020）

引用 0|浏览9

暂无评分

摘要

A Gate-All-Around (GAA) nanosheet (NS) transistor is a candidate for sub-5nm bulk Si CMOS. The impact of the new architecture and relevant process options on intrinsic ESD performance needs to be studied. The first measured results show GAA NS ESD diode performance is strongly influenced by dual epitaxy process options.

查看译文

关键词

dual epitaxy process,gate-all-around nanosheet transistor,gate-all-around nanosheet technologies,GAA NS ESD diode performance,intrinsic ESD performance,relevant process options,bulk silicon CMOS,ESD protection diodes,Si

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要