Energy-Efficient High-Performance Photonic Backplane Network for Rack-Scale Computing Systems

With the mainstream paradigm in high-performance computer architecture being shifted considerably from single-core systems toward multi-core computing systems, system performance and energy efficiency are extensively challenged by the communication capacity among processing units and memories/storage. The emerging silicon photonics, on the other hand, promises exceedingly high bandwidth, low latency, and low energy consumption by enabling optical interconnects between entities. However, the inherent distinction between optical interconnects and electrical ones requires fundamentally different methods to compose a system-level communication network. This paper proposes a systematic approach to optimizing the overall energy-delay product of the photonic backplane network for rack-scale computing systems. The experimental results show the system with proposed 2-layer photonic backplane network with the floorplan optimization improves system performance by 3x and improve system performance per energy consumption by around 46%, which can also maintain good scalability.