Energy Efficient FPGA Implementation of a Spiking Neural Network

This paper presents the design of a fully connected spiking neural network based on modified leaky integrate and fire neuron model which has been trained using the gradient descent learning technique. The network contains 25 neurons (initial resolution was 28 x 28 which was downsampled to 5 x 5) in its first layer and 2 neurons in its output layer since the number of input pixels is 25 and the number of classes is two (“0” and “1”). The three layer network successfully classifies two labels of the MNIST dataset with more than 95.16% accuracy. The architecture of the spiking neural network is then realized on the FPGA. The accuracy obtained with the FPGA architecture is 92.8%.