A Schmitt trigger to benchmark the performance of a new zero-cost transistor

2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS)(2022)

引用 0|浏览4
暂无评分
摘要
Schmitt triggers are useful circuits in analog and digital domains, and they can be used to highlight the strengths and weaknesses of their constituent transistors. In this paper, a benchmark of a new zero-cost (in terms of process steps) medium-voltage transistor build via process optimization is performed in a 40 nm CMOS low-cost technology using Schmitt triggers. The process optimization lowers the threshold voltage, increases the ON-state current at the cost of increasing the OFF-state leakage current and the gate oxide capacitance. A circuit-level study is conducted to see how these characteristics translate into the performance of a Schmitt trigger. Measurements show a good correlation between the transistor-level performance and Schmitt trigger figures of merit.
更多
查看译文
关键词
transistor,MOSFET,CMOS,zero-cost,Schmitt trigger,hysteresis
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要