A Novel Cross-Platform Physically Unclonable Function for Emerging FPGA-based IoT Devices

Physically Unclonable Function (PUF) has been proven as a promising hardware-specific security primitive. The physical structure of PUF is considered to be easy to manufacture but hard to replicate due to intrinsic physical variation of silicon. Nevertheless, FPGA-based PUFs are still mostly infancy from the perspective of technology adoption due to platform dependence properties in the PUF design. In this context, this paper presents a novel platform-independent FPGA-based PUF architecture that eliminates the requirement of placement constraints in delay-based PUF implementation. Additionally, the proposed Cross-Platform RO (CPRO) PUF design need not be validated after implementation in new FPGA families, making it more promising for technology transfer. The design has been implemented and tested in Xilinx FPGA families of 90 nm, 45 nm, and 28 nm technology. In contrast to earlier findings, it is observable that the proposed PUF is highly flexible, leveraging a lower footprint. Experimental results show a close to the ideal performance of the implementation while keeping the desired security intact.