9.4 An In-depth Look at the Intel IPU E2000

2023 IEEE International Solid- State Circuits Conference (ISSCC)(2023)

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摘要
The Intel® Infrastructure Processing Unit (Intel IPU) E2000 is Intel's first ASIC IPU device, a 200G product co-designed with Google and in production as of 2022. It features a rich packet processing pipeline, RDMA and storage capability including NVMe offload and an ARM Neoverse based compute complex enabling customer provided software to execute features ranging from complex packet processing pipelines to storag e transport to device management and telemetry. The device was fabricated in TSMC's 7nm process. Utilizing the combination of general-purpose acceleration and software running in the compute complex, this IPU enables a rich variety of services to be provided to the attached client. Attached clients can range from compute hosts for providing infrastructure as a service, storage disks for fronting a storage target, accelerators such as GPUs or FPGAs for fronting specialized processing functions, or even function as a pure SoC servicing custom appliances or downstream devices like smart switches. This broad deployment capability supports the rapid innovation necessary for the modern datacenter.
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