DARK-Adders: Digital Hardware Trojan Attack on Block-based Approximate Adders

In recent times, approximate computing techniques have emerged as a popular computing paradigm that can significantly minimize consumption of resources at the cost of bounded loss in accuracy of results. More specifically, approximate arithmetic circuits such as addition and multiplication architecture have been widely deployed to benefit image processing, machine learning and other error-resilient applications. However, a major drawback attributed with approximate architectures is that the results generated by them are probabilistic in nature. This indeterminism in input-output characteristics results in security breaches during post-silicon validation. In other words, the relaxation in precision may lower the standard of testing metrics, thus making block-based approximate designs vulnerable to security attacks. This work proposes a digital Hardware Trojan Horse (HTH) that renders approximate adder circuits inefficient. The proposed attack exploits the probabilistic nature of approximate designs to successfully implant the HTH. The presented HTH replaces the original sum-bit generation logic in a 1-bit full adder widely present as a building block in a major class of block-based low latency approximate adders. Experimental results showcase that insertion of HTH in state-of-the-art approximate adders can reduce the end applications accuracy by 2–13%, and 24–31% when Trojan is inserted at Least significant Bit side (LSBs) and Most Significant Bit (MSBs) respectively. Our proposed Trojan does not add significant area overhead upon successful insertion. Additionally, the obtained results also signify that block-based low latency approximate adders with $N$ number of blocks are N/2 times more vulnerable to security attacks than their binary segmentation counterparts. Experimental results also demonstrate that the impact of a digital HTH may be considered to be relatively mild in exact computing designs, it proves to alter the intended behaviour of approximate circuits when tested across real time applications such as machine learning and image processing.