Architecture and Design of a New Non-Quadrature Vector-Sum Microwave Phase Shifter at 10 GHz With Maximum Residual Phase Error of 1.80°
2023 International Conference on Electrical, Computer and Communication Engineering (ECCE)(2023)
摘要
This paper presents the architecture, design, and simulation of a new vector-sum phase shifter for prospected use in applications that require low amplitude loss. The architecture is based on non-quadrature phase generation and synthesis. The phase generation is done by splitting the input signal into two equal-phase output vectors and delaying one signal vector to the other; while the phase synthesis is implemented by subjecting the vectors through path selection and variable amplification & attenuation before subtracting the different paths. A two-bit phase path selection was employed for achieving 360° of coarse & fine tuning. EM simulations of the phase shifter architecture was carried out using RT-Duroid 5880 specifications
$(\varepsilon_{r}=2.2,\boldsymbol{\tan\delta=0.004)}$
at center frequency of 10 GHz. A maximum phase error of
$\mathbf{1.82^{\circ}}$
was obtained for the entire interval of 360 degrees of phase shift. With less than
$2^{\mathrm{o}}$
of phase error, the proposed phase shifter architecture is feasible for millimeter-wave phase array beamforming applications; as it offers the possibility of lower power consumption with the use of lesser compartmental blocks (i.e. compared to a T-bridge phase shifter which uses a chain of multiple blocks that can lead to excessive losses of more than 30 dB).
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关键词
phase shifter,vector-sum phase shifter,digital phase shifter,analog phase shifter,vector synthesizer,phase path selector,vector subtractor,beamformers,phased-array,phased-array systems
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