VLSI Implementation of Error Correction Codes for Molecular Communication

Molecular Communication (MC) is a multidisciplinary branch that lies at the junction of nano, bio and communication technology. MC is evolving to serve almost every field of humanity, be it biomedical, be it environment or be it security against NBC attack. On the other hand, MC lags in technological demonstration and development level. However, like any communication system, Error Correction Code (EEC) play vital role in MC system, to improve the system performance. Recently, literatures have presented on VLSI implementation of Cyclic Reed–Muller (C-RM) and Hamming code. However, VLSI implementation and demonstrations of Self-Orthogonal Convolution Codes (SOCC) and Low-Density Parity Check (LDPC) codes, which outperform over others, are not available in the literatures. Therefore, this paper implements SOCC and LDPC codes in Tanner EDA Tool followed by presenting the power consumption and delay of respective codes. More specifically, this paper presents design and implementation of encoder and decoder of SOCC for MC system using Tanner EDA Tool and demonstrated the performance in terms of power consumption and delay. In addition, similar analysis is presented for LDPC code. It is important to mention that implemented decoder of each of the LDPC and SOCC codes is employing newly presented MLG circuit in is manuscript. Finally, power consumption and delay of SOCC and LDPC are compared with those of available ECCs in literatures.