A Highly Stable PNN-PPN-10T SRAM Cell With Improved Reliability

A new PNN-PPN 10T static random access memory (SRAM) cell is presented in this paper. The proposed design aims to address stability of memory cell at worst-case analysis, leakage power analysis, read power analysis and soft error resilience analysis. The proposed design metrics are compared with existing memory cells such as 6T SRAM, feedback control-8T SRAM, low power-9T SRAM, PPN-10T SRAM, schmitt trigger-HT SRAM, low power-8T SRAM. Results observed that the proposed PPN-PNN 10T SRAM improved stability at worst-case analysis, reduces read delay by 0.98x/ 1.08x/ 1.15x/ 1.21x/ 1.15x/ 1.12x times shorter than 6T SRAM/ 8T SRAM/ 9T SRAM/ 10T SRAM/ 11T SRAM/ LP 8T SRAM cells respectively. Moreover, write delay is 1.13x/ 1.06x/ 1.27x times lower than 10T SRAM/ 11T SRAM/ 8T SRAM respectively. Furthermore, leakage power is also reduced. The simulation result shows that the proposed memory cell is suitable for stable and reliable cache memory applications.