A shared libraries aware and bank partitioning-based mechanism for multicore architecture

Dynamic random-access memory (DRAM) consists of several banks, which are shared resources among cores. Memory interference is caused by sharing with banks among cores, which results in overall system performance reduction. This will exacerbate the problem because shared libraries are commonly used in modern operating systems. The physical memories used by shared libraries are often distributed throughout all banks in DRAM, and shared library codes are regularly run. This will result in a large number of row-buffer conflicts and a decrease in system performance. This paper proposes a new shared library awareness and bank partitioning-based mechanism (SBM) that takes into account inter-thread interference caused by shared libraries and assigns allocated DRAM banks to specific cores rather than processes, thus taking advantage of bank-level parallelism (BLP) and improving system performance isolation. We conducted several experiments to assess the degree of performance isolation achieved by SBM. The findings indicate that SBM significantly enhanced performance isolation.