Hardware-Friendly Tone Mapping Operator Design and Implementation for Real-Time Embedded Vision Applications

Tone-mapping is required to convert High Dynamic Range (HDR) images to Low Dynamic Range (LDR) images for viewing on standard displays. Most recent works in the domain include the efficient implementation of tone-mapping algorithms on Graphics Processing Units (GPUs) for throughput improvements. However, their downside is significantly high power consumption, making such solutions unsuitable for displays on embedded and general consumer electronic devices. In contrast, Field Programmable Gate Arrays (FPGAs) have demonstrated significant speedup on data-intensive image and video applications with a much lower power consumption than GPUs. This paper proposes a modular, scalable and resource-efficient FPGA implementation of a global Tone-Mapping Operator (TMO) based on histogram of the scene luminance and characteristics of the Human Visual System (HVS). Compared to GPU based implementation of a state-of-the-art TMO, our FPGA implementation achieved a higher throughput in the range of 2.5× to 4.5× with power savings of more than two orders of magnitude. Moreover, tonal quality of the proposed solution is better than the baseline TMO in approximately 80% of a dataset of 288 HDR images. The proposed solution also outperformed the state-of-the-art FPGA implementations of other TMOs in throughput, resource usage and scalability.