Process Optimization to Reduce Power in HfO₂-Based Rram Devices for in-Memory Computing

Recently, HfO2-based resistive random-access memory (RRAM) devices have shown promise as candidates for in-memory computing applications. By engineering the distribution of defects or oxygen vacancies, the switching dielectric can potentially enable low power switching and multi-conductance levels. A higher concentration of oxygen vacancies closer to the top electrode a two-terminal RRAM device with a HfO2/Al2O3 bilayer structure reduces switching energy (1). Introducing excess oxygen vacancies near the top electrode through a hydrogen plasma treatment with a Ru as top electrode reduces the switching power of the device (2). In this work we study the pulsed SET operation of different HfO2-based RRAM devices for their possible uses as multi-level cells. We have compared two different RRAM devices with HfO2-based dielectrics. Device-A is prepared with hydrogen plasma treatment at mid-point of HfO2 deposition (10nm Ti/50nmTiN/3nm HfO2(plasma treatment) 3nm HfO2/5nm Ru/5nm ALD TiN/ 50nm PVD TiN). Whereas Device-B constitutes a HfO2/Al2O3 bilayer structure (10nm Ti/50nmTiN/7nm HfO2/1nm Al2O3/5nm Ru/5nm ALD TiN/50nm PVD TiN). Both the devices have Ru as the top metal. Fig. 1 and Fig. 2 show the conductance modulation obtained by applying successive pulse sequences (80 pulses) with increasing the pulse width tp (from 4 𝜇s to 10 ms) every 20 pulses where the pulse height, Vp, remained fixed at 2V during the experiment. A read pulse with voltage Vr=0.1V and pulse width tr=1ms is applied immediately after each pulse. The forming compliance current in Device-A is seven time lower than Device-B. Both devices clearly show promising behavior of multi-level conductance. Figure 1