Thousands of conductance levels in memristors monolithically integrated on CMOS

Abstract Neural networks based on memristive devices have shown potential in substantially improving throughput and energy efficiency for machine learning and artificial intelligence, especially in edge applications. Because training a neural network model from scratch is very costly, it is impractical to do it individually on billions of memristive neural networks distributed at the edge. A practical approach would be to download the synaptic weights obtained from the cloud training and program them directly into memristors for the commercialization of edge applications. Some post-tuning in memristor conductance may follow afterward or during applications. Therefore, a critical requirement on memristors for neural network applications is a high-precision programming ability to guarantee uniform and accurate performance across a massive number of memristive networks. This translates into the requirement of many distinguishable conductance levels on each memristive device, not just lab-made devices but more importantly, devices fabricated in foundries. High precision memristors also benefit other neural network applications, such as training and scientific computing. Here we report over 2048 conductance levels, the largest number among all types of memories ever reported, achieved with memristors in fully integrated chips with 256x256 memristor arrays monolithically integrated on CMOS circuits in a standard foundry. We have unearthed the underlying physics that previously limited the number of achievable conductance levels in memristors and developed electrical operation protocols to circumvent such limitations. These results reveal insights into the fundamental understanding of the microscopic picture of memristive switching and provide approaches to enabling high-precision memristors for various applications.