Wafer-scale and universal van der Waals metal semiconductor contact

Abstract Two-dimensional (2D) semiconductors show great potential for high-performance electronic devices. With atomically thin 2D lattice, achieving high quality and reliable metal contact remains a critical challenge. van der Waals (vdW) contact geometry — in which metal electrodes are physically laminated onto 2D surface — has demonstrated reduced contact resistance with minimized Fermi level pinning effect. However, the vdW contact can only be applied a few choices of metals that can be peeled and laminated, and the manually transfer process is not scalable, greatly limiting this process for practical applications. Here, we report a wafer-scale and universal “low-energy” vdW metal integration strategy that can be readily applicable to different metals and semiconductors. By utilizing thermally decomposable polymer as the buffer layer, different metals could be directly evaporated in wafer-scale without damaging the underlayer 2D semiconductors. This industry compatible polymer buffer could be further dry-removed through a simple annealing process, leading to vdW metal-2D contact with atomic sharp and clean interface. With this technique, for the first time, various industry-compatible metals could be vdW and wafer-scale integrated as the contact of 2D transistors, including Ag, Al, Ti, Cr, Ni, Cu, Co, Au, Pd, exhibiting improved electrical performance depending on the metal work functions. Finally, we demonstrate this vdW integration strategy is not only limited to 2D semiconductors, but could be well-extended to various bulk semiconductors with weakly couple vdW metal-semiconductor contact.