Highly Stable Soft-Error Immune SRAM with Multi-Node Upset Recovery for Aerospace Applications
INTEGRATION-THE VLSI JOURNAL(2023)
摘要
SRAM cells in spacecraft or space stations are susceptible to single event upset (SEU) caused by high-energy particle impacts. Conventional 6 T SRAM cells are more prone to soft errors in this environment. In this paper, we propose a new highly stable soft-error immune SRAM cell with multi-node upset recovery (SIMR-18 T). This design is an improvement from the Quatro-10 T. The design not only tolerates all SEU and performs well in double node upset (DNU). This paper mainly compares with other structures in terms of read and write access time, static noise margin, and critical charge. The write access time of this cell (11.75 ps) is lower than all other cells. The static noise margin for write, about 1010.11 mV, is 151.87% of that of the QUATRO12T.
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关键词
Single event upset(SEU),Static noise margin(SNM),Static random access memory(SRAM),Double node upset (DNU)
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