BEOL Interconnect Innovation: Materials, Process and Systems Co-optimization for 3nm Node and Beyond.

Gaurav Thareja,Ashish Pal, Xingye Wang,Sefa Dag,Shi You,Shashank Sharma, Qing Zhu, Carmen L. Cervantes, Shinjae Hwang, Matthew Spuller, Ben Ng, Pradeep S. Kumar, Norman Tam, Max Gage,Sameer Deshpande,Zhiyuan Wu,Alexander Jansen, Liton Dey,Feng Chen, Xianjin Xie, Keyvan Kashefizadeh,Vinod Reddy, Andy Lo,Zhebo Chen, Sidney Huey,Jianshe Tang,He Ren,Mehul Naik, Brian Brown, Sree Kesapragada,Buvna Ayyagari-Sangamalli,El Mehdi Bazizi,Xianmin Tang

VLSI Technology and Circuits（2023）

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摘要

We present novel back-end-of-line (BEOL) copper interconnect integration for advanced technology nodes using integrated selective barrier copper barrier seed (CuBS) process, annealing and chemical mechanical planarization (CMP). Electrical tests (resistance, reliability) combined with Materials-to-Systems Co-Optimization (MSCO™) simulations confirm significant power-performance-area (PPA) gains for 3nm technology node and beyond.

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