A 122fsrms-Jitter and -60dBc-Reference-Spur 12.24GHz MDLL with a 102 - Multiplication Factor Using a Power-Gating Technique.Yoonseo Cho,Jeonghyun Lee,Suneui Park,Seyeon Yoo,Jaehyouk ChoiVLSI Technology and Circuits（2023）引用 0|浏览12暂无评分AI 理解论文溯源树样例生成溯源树，研究论文发展脉络Chat Paper正在生成论文摘要
