Microservice-based in-network security framework for FPGA NICs.

Lasani Hussain, Mayank Rawat, Neeraj Kumar Yadav,Sumit Darak,Praveen Tammana,Rinku Shah

CCGridW（2023）

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摘要

Recent advancements in programmable network hardware such as smartNICs (e.g., NPU, DPU, FPGA) ¹ and programmable switches (e.g., Intel Tofino) have created opportunities to save precious CPU cycles and achieve low latencies by offloading applications to these devices [1] –[3].

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关键词

DPU,FPGA,Intel Tofino,microservice-based in-network security framework,NPU,precious CPU cycles,programmable network hardware,programmable switches,smartNICs

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