Low Dit of (2-4) x 1010 eV-1cm-2 using Y2O3/epi-Si/Ge Gate Stacks

2023 INTERNATIONAL VLSI SYMPOSIUM ON TECHNOLOGY, SYSTEMS AND APPLICATIONS, VLSI-TSA/VLSI-DAT(2023)

引用 0|浏览7
暂无评分
摘要
In this work, we have achieved record-low interfacial trap densities of (2-4) x 10(10) eV(-1)cm(-2) in the Y2O3/epi-Si/Ge(001) gate stacks, particularly low D-it less than 1 x 10(11) eV(-1)cm(-2) near the conduction band region. Synchrotron radiation photoemission was used to probe the interfacial bonding with atomic hydrogen exposure to elucidate the effect of post-metallization annealing in forming gas. After exposure of atomic hydrogen at 400 degrees C, a great reduction of GeOx and a great increase of SiOx formation, which is stabilized in Si3+ states, suggest that the Y-O-Si formation attributed to the low D-it.
更多
查看译文
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要