Design and Analysis of a Nanosecond Burst-Mode CDR Using MATLAB/Simulink and Opti-System Co-Simulation

Optical packet switching (OPS) networks are promising to accommodate the growing traffic and reduce power consumption in data center communications. OPS networks with nanosecond switching time require nanosecond clock and data recovery (CDR) circuits. The nanosecond CDR can be achieved by utilizing a global frequency-synchronized reference clock for both transmitters (TX) and receivers (RX) and adopting a phase compensation scheme, which leads to predictably managed frequency and phase. However, the CDR still needs to be comprehensively evaluated considering various interferes. We add more analysis by developing a novel optoelectronic co-simulation system that combines the software Opti-system and MATLAB/Simulink. We set up a simple OPS network equipped with the CDR architecture using the simulation system. The feasibility of the CDR mechanism is validated, then various interferes are characterized to evaluate the CDR's stability, including the location variation of reference clock source, channel jitters, and carrier power variations.