Impact of High Temperature Up to 175(degrees)C on the DC and RF Performances of 22-nm FD-SOI MOSFETs

In this work, the effect of rise in temperature from 25 degrees C to 175 degrees C on the performance of 22-nm fully depleted silicon-on-insulator (FD-SOI) MOSFETs is studied under different bias conditions. The devices are measured in dc and RF to observe the zero-temperature coefficient (ZTC) point and extract the prominent RF figures of merit (FoMs), i.e., current-gain cutoff frequency (f (T)) and maximum oscillation frequency (f (max)). The evolution of transconductance (g(m)) with temperature appears to be one of the major causes of the 20% degradation in peak f (T) and f (max) at 175 degrees C. From a low-power application point of view, stepping down Vd from 0.8 to 0.6 V decreases the magnitude of peak f (T) and f max degradation to around 7%-10%, respectively, over the given temperature range while reducing static power consumption (P-dc) around 29%. Furthermore, the variation of f (T) and f(max) at and below the g(m)-ZTC is investigated. Below the g(m)-ZTC point, at a front-gate bias Vg of 0.3 V, an improvement in f (T) of around 20% and an almost steady f(max) are observed.