RapidStream 2.0: Automated Parallel Implementation of Latency–Insensitive FPGA Designs Through Partial Reconfiguration
ACM Transactions on Reconfigurable Technology and Systems(2023)
Key words
Multi-die FPGA,high-level synthesis,hardware acceleration,floorplanning,frequency optimization,HBM optimization
AI Read Science
Must-Reading Tree
Example

Generate MRT to find the research sequence of this paper
Chat Paper
Summary is being generated by the instructions you defined