SPICE Modeling of RADFETs with Different Gate Oxide Thicknesses

M. Marjanović, U. Gürer, N. Mitrović, O. Yilmaz, D. Danković, E. Budak, G. Ristić,E. Yilmaz

2023 IEEE 33rd International Conference on Microelectronics (MIEL)（2023）

引用 0|浏览0

暂无评分

摘要

This paper will present guidelines for creating a SPICE model of RADFETs with different gate oxide thicknesses. Model parameters, such as threshold voltage and carrier mobility, were extracted from the transfer characteristics in the saturation region. The model was satisfactorily used to simulate RADFETs with oxide thicknesses ranging from 40 nm to 300 nm.

查看译文

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要