Optimum Power Architecture for USB-PD EPR

The new USB-PD EPR standard is a step towards a universal adaptor able to work with universal input voltage range (100Vac to 240Vac) and provide output voltages ranging from 5V to 48V. Nevertheless, such wide range voltage operation challenges the power converter topologies used up to now. In this paper an active boost power factor correction (PFC) followed by an asymmetrical half-bridge flyback converter (well-known as hybrid-flyback) is proposed. Its advantages with respect to state-of-the-art solutions are analyzed and the interaction between both stages to achieve optimum efficiency as well as lower stand-by power is presented. The benefits of GaN switches in the hybrid flyback stage are explained. Finally, the results are demonstrated with a 240W prototype.