Passive Third Order Continuous-Time ΔΣ Modulator with Q Enhancement Technique

2022 IEEE International Symposium on Circuits and Systems (ISCAS)(2022)

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摘要
In this paper, a fully passive third order continuoustime (CT) $\Delta\Sigma$ Modulator (DSM) is proposed. By utilizing passive filter, the power cheap DSM still faces poor noise shaping. To improve the performance of this fully passive CTDSM, a Sallen-Key (SK) inserted Q enhancement technique is implemented. The inserted novel SK ensures better noise shaping than the fully passive structure. The proposed DSM is realized in Intel 22nm FinFET process with 0. 9V supply voltage. The passive CTDSM without or with SK (w/oQ enhancement or wQ enhancement) under 5GS/s sampling frequency can achieve 20MHz bandwidth (BW) with SNDR of 63dB, 72dB respectively. FOM values can achieve 55fJ/conv and 21fJ/conv separately.
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continuous-time
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