Ferroelectric FET Nonvolatile Sense-Amplifier-Based Flip-Flops for Low Voltage Operation.

Nonvolatile processors (NVPs) are promising for energy-constrained internet-of-things applications in which frequent switch to standby mode occurs due to their fast and energy-efficient backup and restore operations of locally embedded nonvolatile flip-flops (NV-FFs) with zero leakage current. In addition, the most effective method to reduce dynamic energy consumption is to lower the supply voltage ( ${V} _{DD}$ ). The sense-amplifier-based flip-flop (SAFF) is considered a suitable choice for the low ${V} _{DD}$ operation, since it does not suffer from setup time degradation as ${V} _{DD}$ lowers. This study presents two ferroelectric FET (FeFET) nonvolatile SAFFs (FeFET NV-SAFF-1 and -2) that exhibit significantly low sequencing overhead (setup time + clock-to-Q time) at low ${V} _{DD}$ and consume low operating energy in the range of femto joules with compact layout area. The FeFET NV-SAFF-1 can operate robustly at low ${V} _{DD}$ even with a low resistance ratio. The FeFET NV-SAFF-2 has no area overhead and achieves the best power-performance-area at low ${V} _{DD}$ among state-of-the-art and proposed FeFET NV-FFs.