A 2-W, 90%-Efficiency Single-Stage Dual-Output Wireless Power Receiver with 0.1 to 700-mA Output Current Range Through Dynamic Delay Compensation and Bootstrap Adaptive Body Biasing Circuit.

Wireless power transfer with multiple-output is very helpful for portable devices like wireless solid-state drives, implantable biomedical devices, etc [1-5]. The conventional way to achieve multiple-output is using multiple-stage receiver (RX) for different outputs [1], which would degrade the power efficiency due to the cascade stages. A single-stage dual-output (SSDO) RX was implemented by using a regulated rectifier [2]. However, ten power transistors are needed. An SSDO RX proposed in [3] only required six power transistors, but the two outputs are quite close due to the cross-regulation problem. A full-bridge-separated SSDO RX was proposed to solve the cross-regulation problem [4], thus providing two completely independent outputs. However, the separated rectifier halves the maximum output power. The SSDO RX proposed in [5] overcame the cross-regulation problem through synchronous control and maintained a full-bridge rectifier at high-side output (V OH ). However, the output ripple of low-side output (V OL ) becomes worse if the output current I OL at V OL is much larger than I OH at VOH, reducing the output current range.